China's "Chip Queen"

He Tingbo is a highly prominent Chinese research scientist and executive who serves as the President of Huawei's Semiconductor Business Department and the President of HiSilicon, Huawei's internal chip-design unit. Widely dubbed China's "Chip Queen," she is celebrated domestically as a symbol of the country's technological self-reliance and its strategic push to survive severe U.S. technology sanctions. She is also an Executive Director on the Huawei Investment & Holding Co., Ltd. Board of Directors.

Background and Education

•           Early Life: Born in 1969 in Changsha, Hunan, China.

•           Education: Earned a dual Bachelor's degree in Semiconductor Physics and Communications Engineering from the Beijing University of Posts and Telecommunications (BUPT) in 1991. She completed her Master's degree in Semiconductor Devices and Physics at BUPT in 1994.

•           Early Roles: Joined Huawei in 1996 as an optical communication chip designer and later led teams to develop 3G wireless chips.

•           HiSilicon Leadership: Appointed to run HiSilicon in 2004, orchestrating the development of the iconic Kirin mobile chip series and Balong modems. Under her guidance, HiSilicon achieved massive commercial success and reached profitability by 2013.

•           The "Spare Tire" Strategy: In 2019, when Washington placed Huawei on the Entity List—cutting off access to American software and fabrication tech—He Tingbo gained massive public fame by publishing an internal letter. She revealed that HiSilicon had secretly spent years developing a "spare tire" portfolio of alternative chips to ensure Huawei's survival.

Breakthrough: The Tau (τ) Scaling Law

In mid-2026, He Tingbo stepped back into the global spotlight at the IEEE International Symposium on Circuits and Systems in Shanghai by introducing the Tau (τ) Scaling Law.

 

•           The Principle: It shifts the industry focus from geometric transistor shrinking (Moore's Law) to minimizing signal propagation time delay (τ) across devices, circuits, chips, and systems.

 

•           The Goal: Huawei claims this post-Moore's Law approach can help mass-produce chips with a transistor density equivalent to a cutting-edge 1.4-nanometer (14 Å) process by 2031.

•           •  Device Level: Minimizing electrical resistance and parasitic capacitance at the physical layer.

•           •  Circuit Level: Using "LogicFolding" architecture to stack active circuit layers vertically via hybrid bonding, significantly shortening critical-path wiring distances.

•           •  Chip Level: Coordinated hardware-software design for fine-grained, workload-driven instruction flows.

 

•     •  System Level: Employing protocols like UnifiedBus to deliver unified memory addressing and reduce communication latency.

 

 

•           Sanction Defiance: The strategy seeks a viable manufacturing roadmap for advanced chips without relying on the highly restricted Extreme Ultraviolet (EUV) lithography machines.

•           Track Record: Her co-authored paper noted that this methodology summarized lessons from mass-producing 381 distinct chip designs taped out by Huawei between 2020 and 2026.