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2026 m. spalio 14 d., trečiadienis

AI Chips' New Secret Sauce Is Packaging


The future of cheap AI computing is in clusters of thousands of chips. Chinese are aiming to produce chips as good, as Nvidia's. Since China has better electricity supply than USA, Chinese can use chips that are less energy efficient, than Nvidia's.

China is indeed using energy abundance and massive data-center clusters to offset the lower per-chip energy efficiency of its domestic semiconductors.

How China Compares and Compensates

•     The Efficiency Gap: Homegrown Chinese AI chips—such as Huawei’s Ascend series—traditionally lag behind Nvidia’s top-tier processors (like the H200 or Blackwell lines) in single-chip raw computing power and energy efficiency.

•     The Cluster Strategy: Instead of matching Nvidia's per-chip performance or low energy draw piece-for-piece, Chinese tech firms and state initiatives link thousands of less-efficient domestic chips together into massive, high-performance clusters.

•     Power Infrastructure: China’s vast energy resources and pre-built, fully powered data-center infrastructure allow it to absorb higher power consumption penalties that would be more difficult or costly to scale in the U.S.

•     Software Evolution: Ecosystem gaps (like Nvidia’s CUDA) are closing; tools released by firms like DeepSeek have made domestic chips much easier for developers to program.

•           Mixed Reality in the Market: Despite a strong national push to rely purely on domestic alternatives, Chinese firms have still bought millions of Nvidia's compliant gaming and workstation GPUs (such as RTX 5090 or RTX Pro lines) to fill gaps in AI workloads while local production ramps up.

 

 

 

 

“Making better chips for AI is increasingly about how they are laid out and stitched together -- not just cramming together as many transistors as possible on a single piece of silicon.

 

The shift toward "advanced packaging" in the chip world -- a term referring to a variety of strategies for knitting together pieces of silicon into one big chip -- has long been building. And it looks certain to be a much bigger driver of chip advances in the future.

 

The reason is simple: The old ways of making chips better-performing and more energy efficient aren't working as well as they used to.

 

For decades, chip advances came almost exclusively from innovations in how transistors were designed and how small they were. A cadence where the number of transistors on a given piece of silicon doubled roughly every two years took hold. The pace of advances became so reliable that it became known as Moore's Law, named after Intel co-founder Gordon Moore, who first observed it.

 

In the past decade or so, as transistors became so small that they're measured in nanometers, that law has come into question. Some chip-makers like Intel struggled to advance their manufacturing at the same pace as before. Others that did reliably advance -- notably, Taiwan Semiconductor Manufacturing Co. -- made less-enormous leaps in transistor density from generation to generation.

 

The rapidly rising cost of the most advanced chip-making technology presented another challenge. Well before the AI boom, that helped push the main makers of large central processing units -- Advanced Micro Devices and Intel -- toward changes in packaging. They moved away from etching circuitry onto a single piece of expensive silicon. Instead, they welded together numerous pieces of silicon, some made with older and less-expensive chip-making technology. As a side benefit, the strategy helped improve manufacturing yields.

 

AI, though, has kicked the packaging race into a new gear. Cost hasn't been as big a consideration for Nvidia as it developed the AI chips that have driven the boom. But performance has, and its market-leading chips wouldn't have been possible to manufacture without advanced packaging.

 

Nvidia's chips use technologies developed by TSMC that bring together massive amounts of AI number-crunching power with lots of high-bandwidth memory, all within one advanced package. Constraints on the growth of packaging have been a bottleneck for Nvidia's sales, although TSMC has converted old chip factories into packaging facilities and increased packaging capacity several times over in the past few years.

 

More investment in packaging is on deck as companies like TSMC, which reports quarterly results on Thursday, work with customers to push chip-making limits.

 

Future packaging approaches increasingly involve stacking pieces of silicon on top of each other, not just side by side.

 

The shift toward packaging is making it more of a focus, despite being historically a lower-margin business with relatively little innovation. Chip manufacturers like TSMC are doing more of it themselves, bringing in-house an activity that previously was largely outsourced.

 

And chip manufacturing equipment makers including Applied Materials have been touting packaging's potential: Chief executive Gary Dickerson said in August that packaging-related revenue would grow more than 70% this year.” [1]

 

1. AI Chips' New Secret Sauce Is Packaging. Fitch, Asa.  Wall Street Journal, Eastern edition; New York, N.Y.. 14 Oct 2026: B13. 

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